Logic Gates: NOT, AND, OR

The NOT Gate

A NOT gate takes one input and flips it. HIGH in → LOW out. LOW in → HIGH out. Built from a single NPN transistor.

Vcc ──[R_pull]──┬── OUTPUT
                │
             Collector
               NPN
             Emitter
                │
               GND

INPUT ──[R_base]── Base

When INPUT is HIGH: transistor saturates → collector pulled near GND → OUTPUT is LOW. When INPUT is LOW: transistor cuts off → collector floats up through R_pull → OUTPUT is HIGH.

One transistor, two resistors, logic inversion.

Component Values (5V, 2N2222)

Pull-up resistor — limits current through the collector load (and the LED if using one as indicator):

R_pull = (Vcc - V_LED - Vce_sat) / I_LED
       = (5V - 2V - 0.2V) / 0.02A = 140Ω → use 220Ω

Base resistor — overdrive into saturation:

I_B = (I_C / β) × 5 = (20mA / 100) × 5 = 1mA
R_base = (5V - 0.7V) / 0.001A = 4.3kΩ → use 4.7kΩ

The AND Gate

Output is HIGH only when both inputs are HIGH. Two NPN transistors in series — both must be ON for current to flow.

Vcc ──[R_pull]── OUTPUT
                    │
                 Collector
                  NPN (Q1)   ← INPUT A
                 Emitter
                    │
                 Collector
                  NPN (Q2)   ← INPUT B
                 Emitter
                    │
                   GND

If either transistor is off, the path to GND is broken and OUTPUT stays HIGH (pulled up). Only when both are saturated does OUTPUT go LOW — which is AND logic, inverted. Add a NOT stage after to get a true AND, or just read the logic accordingly (this is actually NAND).

The OR Gate

Output is HIGH when either input is HIGH. Two NPN transistors in parallel — either one conducting pulls the output LOW (again, naturally NAND-ish — two transistors driving the same output node to GND).

Vcc ──[R_pull]──┬── OUTPUT
                │
         Collector  Collector
          NPN(Q1)    NPN(Q2)
         Emitter    Emitter
                │
               GND

INPUT A ──[R_base]── Q1 Base
INPUT B ──[R_base]── Q2 Base

Either transistor conducting pulls OUTPUT to GND → LOW. Both off → OUTPUT is HIGH. This is NOR. Invert with a NOT stage for OR.

Casualties

LED — killed

First NOT gate attempt: forgot the pull-up resistor entirely. Connected the LED directly from Vcc to collector with no current limiting. The transistor switched off, full Vcc hit the LED unimpeded, and it died in one flash. An LED is not a resistor — it will draw as much current as the circuit allows.

Finger — scorched

After fixing the resistors and getting the NOT gate working correctly, touched the 2N2222 to check temperature.

It was hot.

TO-92 is a tiny plastic package with almost no thermal mass. Even at moderate collector currents it heats up fast — no heatsink, nowhere for the heat to go. Not dangerous at these voltages, but a good reminder:

P (saturated)   = Vce_sat × I_C = 0.2V × 0.02A = 4mW    (fine)
P (linear mode) = (Vcc/2) × I_C = 2.5V × 0.02A = 50mW   (gets hot fast)

The transistor was probably drifting in and out of full saturation while testing. That’s where the heat came from.

Truth Tables

A	B	NOT A	A AND B	A OR B
0	0	1	0	0
0	1	1	0	1
1	0	0	0	1
1	1	0	1	1

All three gates verified on breadboard. The AND and OR implementations using discrete transistors are technically NAND and NOR — inverting logic by nature. Every “real” AND or OR needs a NOT stage at the output, which is why NAND and NOR are actually the more fundamental gates in practice.